Agilent 5991-4584EN Low-Cost DDR3 Decode and Analysis with the 16850 Series Portable Logic Analyzers - Appli free download

File name 5991-4584EN Low-Cost DDR3 Decode and Analysis with the 16850 Series Portable Logic Analyzers - Appli

Keysight Technologies Low-Cost DDR3 Decode and Analysis with the 16850 Series Portable Logic Analyzers Application Note Introduction As embedded systems take on more sophisticated applications, they also require advanced external memory systems, such as DDR3, in order to offer adequate throughput. At times it can be helpful to see memory activity and perform some level of memory analysis in order to properly validate and debug a prototype system. New options now allow this at inexpensive price points compared to previous solutions. New general-purpose, low-cost logic analyzers, like the 16850 Series shown in Figure 1, offer the performance required for such measurements as well as related analysis tools to provide this kind of insight. To support the goal of reducing the cost of these measurements, the DDR3 decoder in the solution has been modified to work from address and command signals only, thus reducing the total channel count necessary for meaningful measurements. For example, an entry-level 34-channel system can perform DDR3 1333 address and command state (synchronous) measurements and analysis for around $36K. In the past, a logic analyzer solution that could offer these measurements and analysis required a budget of around $100K. This application note will outline how to make low-cost measurements on DDR3 interfaces and conduct performance analysis and compliance tests to evaluate these memory systems during debug and validation of a digital prototype. Probing requirements for DDR3 measurements In order to make real-time measurements on the interface between the DDR3 memory controller and memory devices, it is necessary to probe signals in a way that eliminates significant distortion and instead provides an accurate picture of those signals. A good probing option for designs with embedded memories is a BGA probe, as shown in Figure 2. Address, command, and data signals are intercepted and brought by coaxial ribbon cable to the logic analyzer. DDR3 BGA interposers contain a buried tip resistor to isolate the DRAM system from the logic analyzer probing. This probing scheme is workable to DDR3 rates of up to 2400 Mbit per second. This setup provides plenty of margin for the DDR3 1333 measurements made by the 16850 Series. Figure 2. x8 DDR3 BGA probe connection. Other probing options include the use of either a DIMM interposer or a mid-bus probe. Mid-bus probing involves placing connection pads or a connector somewhere along the PC board memory traces between the IC containing the memory controller and the memory ICs. A probe then touches those pads or it plugs into the connector to get access to the DDR3 signals. 3 The advantage of a BGA probe is that no special PC board modifications are required other than ensuring there is enough keep out volume (kov) for the probe to fit. In addition, logic